Reversible Logic Synthesis with Cascades of New Family of Gates

Abstract: Reversible circuits are currently on of top approaches to power minimization and the one whose importance will be only growing with time. In this paper, the well known Feynman gate is generalized to k*k gate and a new generalized k*k family of reversible gates is proposed. A synthesis method for multi-output SOP function using cascades of the new gate family is presented. For utilizing the benefit of product sharing among the output functions, two graph-based data structures are used. Another synthesis method for AND-OR-EXOR function using cascades of the new gate family and generalized Feynman gate is also presented. Synthesis method for single-output ESOP function using cascades of the new gate family is also presented. All these synthesis methods are technology independent and generate very few garbage outputs and need few input constants.